Postiz: Extending Post-Increment Addressing for Loop Optimization and Code Size Reduction
Memory access instructions with auto-addressing modes are prevalent in various Instruction Set Architectures (ISAs), yet their use in compilers remains limited. Existing methods address code optimization in one of two ways: they either focus on reducing code size, but are constrained to basic block-level optimizations and may not fully exploit architectural benefits, or they optimize loop performance, often neglecting the advantages of post-increment instructions and focusing primarily on innermost loops while leaving outer loops unoptimized.
To address these shortcomings and meet the needs of real-world Machine Learning (ML) applications, we introduce \textit{Postiz}, a novel post-increment loop optimization technique. \textit{Postiz} extends post-increment optimizations beyond traditional limits, incorporating enhancements for inner loops, cross-loop regions, and nested loop structures. Through a profitability analysis, \textit{Postiz} optimizes code judiciously, leveraging architectural advantages and reducing code size without compromising improvement made by other optimizations.
Our experiments show that \textit{Postiz} is effective, achieving an optimization coverage of $98.04%$ on \textit{MobileNet} and \textit{BERT} benchmarks. In comparison to default LLVM optimization, \textit{Postiz} generates approximately four times more post-increment instructions. Moreover, it reduces code size by an average of $9.45%$ across various platforms. These improvements represent significant advancements over current methods, showcasing \textit{Postiz}’s potential to enhance compiler optimizations in a meaningful way.
Wed 5 MarDisplayed time zone: Pacific Time (US & Canada) change
10:00 - 11:20 | |||
10:00 20mTalk | Postiz: Extending Post-Increment Addressing for Loop Optimization and Code Size Reduction Main Conference enming fan , Xiaofeng Guan Shanghai Jiao Tong University; Shanghai Enflame Technology, Fan Hu , Heng Shi Enflame Tech Co., Hao Zhou Enflame Tech Co., Jianguo Yao Shanghai Jiao Tong University; Shanghai Enflame Technology | ||
10:20 20mTalk | Compiler Auto-Tuning Using Synergistic Pass Pairs Main Conference Haolin Pan Institute of Software, Chinese Academy of Sciences;School of Intelligent Science and Technology, HIAS, UCAS, Hangzhou;University of Chinese Academy of Sciences, Yuanyu Wei Institute of Software, Chinese Academy of Sciences;School of Intelligent Science and Technology, HIAS, UCAS, Hangzhou;University of Chinese Academy of Sciences, Mingjie Xing Institute of Software, Chinese Academy of Sciences, Yanjun Wu Institute of Software, Chinese Academy of Sciences, Chen Zhao Institute of Software, Chinese Academy of Sciences | ||
10:40 20mTalk | Stardust: Compiling Sparse Tensor Algebra to a Reconfigurable Dataflow Architecture Main Conference Olivia Hsu Stanford University, Alexander Rucker Stanford University, Tian Zhao Stanford University, Varun Desai Stanford University, Kunle Olukotun Stanford University, Fredrik Kjolstad Stanford University | ||
11:00 20mTalk | Vectron: A Dynamic Programming Auto-Vectorization Framework Main Conference Sourena Naser Moghaddasi University of Victoria, Haris Smajlović University of Victoria, Ariya Shajii Exaloop, Ibrahim Numanagić University of Victoria |